Key architectural features of the AMD Athlon™ processor include:

• The industry's first nine-issue superpipelined, superscalar x86 processor microarchitecture designed for high clock frequencies:
  • Multiple parallel x86 instruction decoders
  • Three out-of-order, superscalar, fully pipelined floating point execution units, which execute x87 (floating point), MMX™ and 3DNow!™ instructions
  • Three out-of-order, superscalar, pipelined integer units
  • Three out-of-order, superscalar, pipelined address calculation units
  • 72-entry instruction control unit
  • Advanced dynamic branch prediction

• Enhanced 3DNow!™ technology for leading-edge 3D performance
  • 21 original 3DNow! instructions-the first technology enabling superscalar SIMD
  • 19 new instructions to enable improved integer math calculations for speech or video encoding and improved data movement for Internet plug-ins and other streaming applications
  • 5 new DSP instructions to improve soft modem, soft ADSL, Dolby Digital surround sound, and MP3 applications
  • Compatible with Windows® 98, Windows 95, and Windows NT® 4.x without software patches

• 200MHz AMD Athlon™ system bus enabling leading-edge system bandwidth for data movement-intensive applications
  • Source synchronous clocking (clock forwarding) technology
  • Support for 8-bit ECC for data bus integrity
  • Peak bandwidth of 1.6 to 3.2 GB/s
  • Multiprocessing support: point-to-point topology, with number of processors in SMP systems determined by chipset implementation
  • Support for 24 outstanding transactions per processor

• The AMD Athlon processor with performance-enhancing cache memory features 128K of L1 cache and 256K of integrated, on-chip L2 cache for a total of 384K full speed, on-chip cache

• Socket A and Slot A infrastructure designs are based on high-performance platforms and are supported by a full line of optimized infrastructure solutions (chipsets, motherboards, BIOS)

• Slot A
  • Available in processor cartridge with mechanical dimensions comparable to Pentium® III
  • Leverages existing physical/mechanical Slot 1 PC infrastructure, including mechanical connector, but with different bus protocols and electrical definitions
  • Electrical interface compatible with 200MHz AMD Athlon system bus, based on Alpha EV6 bus protocol

• Slot A
  • Available in Pin Grid Array (PGA) for mounting in a socketed infrastructure
  • Electrical interface compatible with 200MHz AMD Athlon system bus, based on Alpha EV6™ bus protocol

• Die size: approximately 37 million transistors on 120 mm2 die on 0.18-micron process technology

• Manufactured using AMD's state-of-the-art 0.18-micron process technology at AMD's Fab 25 and Fab 30 wafer fabrication facilities

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