Architecture Summary

Before we leap headlong into the technical and performance aspects of the Duron, we need to have a basic understanding of the Duron core architecture.

The following features summarise the architecture of the AMD Duron processor:

• Chip manufactured with 0.18 micron technology with Aluminium/Copper interconnects
• Spitfire core based on Athlon architecture with 25 million transistors and 100mm² core size
• Only works with AMD specified motherboards with 462-pin Socket A interface
• High performance 100MHz EV6 system bus (200 FSB)
• 128KB L1 cache (64KB for data and 64KB for instructions)
• 64KB L2 integrated on-die cache working at the full processor frequency
• 1.5V Vcore
• 3DNow! SIMD-instructions
• 600, 650, 700, 750, 800, 850MHz versions available

The Duron core is based on AMD's 'Spitfire' and is currently based on four clock speeds 600,650,700,750, 800MHz and the newest addition to its family the 850MHz. The cache architecture features 128-Kbyte L1 cache and a 16-way, on-chip exclusive 64-Kbyte L2 cache featuring a 64-bit data path. The key word being 'exclusive' however, you may be forgiven to think it may be the quantity that matters (64-Kbyte L2), but alas no, contrary to what we have been made to believe in the past. In comparison, the new Intel Celeron 'Coppermine' cache architecture features 32-Kbyte L1 and a 4-way, on-chip inclusive 128-Kbyte L2 cache featuring a 256-bit data path. While the Celeron L1 cache is duplicated within the L2 cache, the Duron operates an 'exclusive' functionality allowing separate operations for both the L1 and L2 cache. In practice this means the Celeron cache is reduced to 128K less 32K = 96-Kbyte, so it really only has 128-Kbyte to operate with. Whilst, the Duron retains the full 192-Kbyte to store data. The L2 cache on Duron features a 64-bit data path, while the Celeron features a 256-bit data path, providing the new Celeron with a quadruple L2 bandwidth advantage over the Duron. The L2 cache on the Duron has a 16-way set associative mapping algorithm as opposed to the Celeron which has a 4-way set associative, the reason for this is Intel disables half of the L2 cache on the Pentium III and produces a Celeron, a comparison of the die sizes as being identical provides further confirmation. The Duron on the other hand is manufactured with a smaller die size, and thus retains the 16-way set associative L2 cache just like the Athlon 'Thunderbird'. The Duron die size is 100mm² while the Thunderbird is 120mm² and hence AMD can produce the Duron cheaper than the Thunderbird. Intel on the other hand, cannot reduce the cost of production, as the Celeron and Intel Pentium III are identical except for the L2 cache and System Bus.

The Low/Middle range processor battle has begun the two main players Intel and AMD have their processors in their respective corners, both have individual advantages over the other, is there a single major factor that will set them apart? We think so, what used to be Intel's advantage at one time is now Intel's undoing by restricting the Celeron to a 66Mhz Front Side Bus while AMD has gone all out with a 200Mhz Front Side Bus. This has a significant impact on performance, and provides Duron with a tremendous overall advantage.

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