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Intel Platform Roadmap Update
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Intel Platform Roadmap


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Intel Platform Roadmap Update

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Sections
P4 Pricing Strategies
P4 Performance Issues
Tualatin Re-Positioning
Re-Positioning of Almador
The Almador Feature Set
Celeron: A New Life
Summary

Intel Platform Roadmap Update

Tualatin Re-Positioning

As stated in a previous InQuest P4 Roadmap article, Intel will sample Tualatin in Q2'01, with production in Q3'01, while at the same time ramping production of the new P4 Northwood processor. Tualatin is a 0.13 micron shrink of the current Coppermine core with several enhancements, most notably a larger 512K on die L2 cache. It will ship in an FC-PGA2 package which is a standard FC-PGA with an Integrated Heat Spreader.

Tualatin will use the existing PGA 370 socket, but it will not run in current generation P3 systems designed for Coppermine. We have identified at least two possible reasons for this. The first is because of Tualatin's lower Vtt specification of 1.2V as compared to 1.5V for Coppermine. The other is due to a change in CPU bus clock design. In order to enable a 200MHz external bus clock speed, Intel had to change the design to use a differential clock instead of the traditional clock signal currently existing in the P3 and Celeron processors. The only real benefit of this differential clock design is its scalability beyond 133MHz.

After deciding to migrate Northwood + Brookdale + DDR into the mainstream in mid 2001, Intel was forced to make changes to its Tualatin positioning. As it was previously defined, Tualatin would ship with DDR about the same time as Northwood+Brookdale. This would potentially undermine the ability of the P4 to scale into the mainstream. In order to avoid this Intel will at least temporarily 'de-feature' the processor and its platform. First to go is its 200MHz FSB - however, the differential clock scheme should still survive, so that Intel will be free to move to 200MHz at will. We estimate that sometime after Northwood+Brookdale are firmly on their production ramp, Tualatin processors will be introduced with a 200MHz FSB.

Coppermine-T

To aid in the transition from Coppermine to Tualatin, Intel is developing a new stepping of its Coppermine processor that will yield 100% to both Vtt specifications of 1.2V and 1.5V. This chip will be tweaked to yield well at 1.13GHz and will be the device that will finally ramp to production in Q1'01 at that speed. Intel will not make a strong marketing statement about this chip however. It will be seen as an evolutionary part of the Coppermine design. Coppermine-T (a.k.a. Cu-T) will still have a 256K cache and can operate in existing Coppermine platforms. Coppermine-T will also be launched in January '01 as a 1GHz mobile processor.

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